RTL Simulation 方法
文件结构
.
|-- rtl
| |-- cabac
| |-- db
| |-- enc_defines.v
| |-- fetch
| |-- fme
| |-- h265core.v
| |-- ime
| |-- intra
| |-- mc
| |-- mem
| |-- pre_i
| |-- top
| `-- tq
`-- sim
`-- h265core
Modelsim
# go to simulation directory
cd ./sim/h265core
# run simulation
./vsim.run
NCsim
# go to simulation directory
cd ./sim/h265core
# run simulation
./make ncsim
Simulation result
*** CHECK TOP ! ***
fime auto check is on
fme auto check is on
mvd auto check is on
db auto check is on
fetch auto check is on
bs auto check is on
*** TEST P FRAMES ! ***
at 00000600, Frame Number = 00, mb_x_first = 00, mb_y_first = 00
at 00050065, Frame Number = 00, mb_x_first = 01, mb_y_first = 00
at 00091015, Frame Number = 00, mb_x_first = 02, mb_y_first = 00
...
...
...
at 10594605, Frame Number = 07, mb_x_first = 01, mb_y_first = 00
at 10637335, Frame Number = 07, mb_x_first = 02, mb_y_first = 00
at 10649965, Frame Number = 07, mb_x_first = 00, mb_y_first = 00
*** TEST I FRAMES ! ***
at 10660075, Frame Number = 00, mb_x_first = 00, mb_y_first = 00
at 10778975, Frame Number = 00, mb_x_first = 01, mb_y_first = 00
at 10876295, Frame Number = 00, mb_x_first = 02, mb_y_first = 00
...
...
...
at 40551735, Frame Number = 09, mb_x_first = 06, mb_y_first = 03
at 40638475, Frame Number = 09, mb_x_first = 00, mb_y_first = 00
at 40680215, Frame Number = 10, mb_x_first = 00, mb_y_first = 00
*** CHECK FNISHED ! ***
Simulation complete via $finish(1) at time 40682215 NS + 0
./tb_top.v:578 $finish ;
。况且确实目前的FPGA还不够好玩，大大小小的IP很多都是收费的，不像软件领域开源项目多如牛毛，硬件开源的项目确实很少，并且大多欠缺维护。