Subcategories

  • xkAVC Codec (K3) FPGA Evaluation Edition

    2 Topics
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  • xkHEVC Codec (K1、K2) FPGA Evaluation Edition

    4 Topics
    4 Posts
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    Hey all, can anyone explain what the ime_cfg.dat file flashed via testbench to the design means. I wanna know what each value in the dat file means
  • Open Source ISP Processor

    10 Topics
    22 Posts
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  • Open Source Deep Learning Accelerator

    1 Topics
    1 Posts
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  • Open Source Deep Learning Accelerator

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    1 Posts
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    PBK325T FPGA Board [image: 1764725970134-d49d3a5c-50b8-4b6e-9851-ea74deeb2ad2-image.png] [image: 1764726002740-bde5b7ea-ec1e-42c3-9d3c-05dd5e4463ac-image.png] We provide all the IP demos on PBK325T FPGA Board, including H.264 Encoder / Decoder Demo H.265 Encoder / Decoder Demo xkZERO Encoder / Decoder Demo xkISP Demo More open source sample projects will be released based on PBK325T later. To purchase this development board, please contact sales@doingstar.com PB7K325_User_Manual.pdf
  • 请问HEVC的IP CORE和HM比的话性能如何

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    硬件编码性能肯定不能跟HM的性能比的。HM穷举起来一定能搜索到最优的模式组合,而硬件为了实时性要求一定是采用快速算法牺牲掉编码性能的。 intel和海思都是大厂,据我了解海思做H.265的都几百人的团队,他们的芯片也仅能做到差30%~50%的话,目前应该不存在差HM10%的硬件编码器。
  • OpenASIC微信公众号发布

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  • 0 Votes
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    intra prediction我们分成两个部分,pre intra做mode decision,post intra 做partiton decision。 目前版本的代码mode decision只传一个mode给post intra。 后期要预测的更准的话,需要多传几个mode。目前我们自己实验室测试下来,传8个mode给post intra就预测的很准了。
  • 是否有版本库?

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    个人觉得放在github上较好,在那也有不少HDL相关的项目。以前用opencores.org,但其SVN和管理起来不太好。 昨天没有在github上找到,所以基于v1.0偷偷把建了一个,方面自己后续的学习和研究 https://github.com/Bearzeng/h.265_encoder