H265 ENCODER RTL V2.0仿真教程
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@Fudh 我们用的zcu102,zynq ultrascale+,谢谢
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请问cabac_bina.v中的两处for循环,都以i作为循环变量,是不是有问题?
// --- Specail --- //
reg ctx_spflag[0:3];
integer i;always @ (*)
begin
for (i=0; i<4; i=i+1)
begin
case(ctx[i])
9'd8:
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@tang 您是否使用Xilinx板(尤其是Zynq ultrascale + zcu102板)成功实现了代码?
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@kemberly 我们成功实现了,谢谢
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@tang, 可以使用Windows模擬嗎
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@yfor 1920x1088有RTL仿真过可以吗?
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@tang
I'm getting some errors while doing the simulaion.
The parameter 'bs_byte_cnt' isn't matching between f265 and h265
How can it be corrected
I've attached the screenshot..Please tell模拟时出现一些错误。
f265和h265之间的参数'bs_byte_cnt'不匹配
如何纠正
我已附上屏幕截图。.请告诉
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@wr115946873
I'm getting some errors while doing the simulaion.
The parameter 'bs_byte_cnt' isn't matching between f265 and h265
How can it be corrected
I've attached the screenshot..Please tell模拟时出现一些错误。
f265和h265之间的参数'bs_byte_cnt'不匹配
如何纠正
我已附上屏幕截图。.请告诉
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Sir,can you please tell which module is to be added for rate control??
I'm currently working on h265enc_v2.0 made by you..
I'm not able to get the output because of some errors in simulation.I'm attaching the screenshot of the errors in this.
Please tell how to correct the errors.先生,您能告诉我们要添加哪个模块进行速率控制吗?
我目前正在研究您制作的h265enc_v2.0。
由于模拟中存在一些错误,因此我无法获得输出。我在此附加了错误的屏幕截图。
请告诉您如何纠正错误。