目前可以用U200/U250这种大容量FPGA运行的，带摄像头的FPGA目前还没找到合适的支持RAW数据输入的摄像头模块
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RE: 请问会提供xkISP在FPGA上运行的demo吗？posted in xkISP
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RE: 关于这个开源项目 from VIP Labposted in 新闻文档 | News & Documents
@erwang 我们的书已经出版了，《视频编解码芯片设计原理》https://item.jd.com/10059208033891.html
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xkISP - Open Source ISP IP Coreposted in 代码发布 | OpenASIC Code Release
Introduction
xkISP is an open source image signal processor (ISP) based on Xilinx HLS development tools. xkISP is jointly developed by VIP Lab of Fudan university and DAMO CTL lab of Alibaba. Up to now, xkISP supports to process 12-bit raw image data of any resolution. The entire pipeline includes 17 function modules shown in the following:
File Structure
xkISP ├─fpga │ host.cpp │ top.cpp │ top.h │ xcl2.cpp │ xcl2.h │ ├─src │ isp_top.h │ file_define.h │ "*module*".cpp │ "*module*".h │ ... │ ├─tb │ tb_"*module*".cpp │ ... │ ├─tcl │ Makefile │ "*module*".tcl │ "*module*"_directives.tcl │ ... │ ├─tv │ Makefile │ hls_param.txt │ input.raw │ isp │ readme_for_tv ├─ LICENSE ├─ setup_env.sh └─ README.md- fpga contains code files for top level integration verification.
- src contains source code files which are the single module of the xkISP project and head files(file_define.h) for single module test.
- tb contains code files for verificating the function consistency with Cmodel(tv/isp) in the module level.
- tcl contains the scripts for execuating the code files in the tb("module".tcl) and adding the pragma command for the code files in the src ("module"_directives.tcl). Makefile in the tcl is used for module level verification.
- tv contains the files for generating the test vectors. You can read the readme_for_tv for more details. setup_env.sh is used to designate the development tools. (Vitis HLS or Vivado)
Download
Clone this repo in Github:
git clone https://github.com/openasic-org/xkISP.git cd xkISP -
RE: 对于想参加项目开发的同学posted in 交流讨论 | General Discussion
@fly1198721171 你好！根据我们前期开发下来的经验，我们目前暂时不接受外部开发者，主要考虑到硬件开发过程中的流程比较复杂，外部开发者难以持续时间投入