<![CDATA[H.265/HEVC Encoder IP Core V2.0 综合结果]]>

  • DC with TSMC65nm under 400MHz
    0_1561024078447_dcresult.JPG

  • Xilinx FPGA
    0_1561024093841_FPGAresult.JPG

    • ]]>    http://www.openasic.org/topic/76/h-265-hevc-encoder-ip-core-v2-0-综合结果RSS for NodeSat, 06 Jun 2026 14:06:19 GMTThu, 20 Jun 2019 09:49:40 GMT60<![CDATA[Reply to H.265/HEVC Encoder IP Core V2.0 综合结果 on Sat, 16 Nov 2024 03:47:36 GMT]]>请问这个Xilinx FPGA是哪一个系列的呢 打扰了 期待您的回复

    ]]>    http://www.openasic.org/post/670http://www.openasic.org/post/670Sat, 16 Nov 2024 03:47:36 GMT